With the continuous development of science and technology, the field of embedded systems is becoming more and more extensive. In terms of product performance experience, more manufacturers pay more and more attention to low-power design, and the low-power design of circuits and systems has always been an important factor to be considered when designing electronic technicians. Especially in the last two years, the popular wearable products, smart watches, etc. are all powered by lithium batteries. If you use a lithium battery of the same capacity for testing, it is not difficult to find that the low power consumption of electronic products is good, and the longer the working time, the better the performance. it is good.
So how do you consider low power design? From a general perspective, the current low-power design is mainly considered from two aspects: chip design and system design:
First, with the rapid development of semiconductor technology and the increase of chip operating frequency, the power consumption of the chip increases rapidly, and the increase of power consumption will lead to an increase in the heat generation of the chip and a decrease in reliability. Therefore, power consumption has become an important consideration in the design of deep submicron integrated circuits.
Second, embedded system design is mainly used in portable and mobile products, and these products do not always have sufficient power supply, often powered by batteries, so designers consider reducing power from every detail. Consume to maximize battery life.
In fact, considering low-power design from a global perspective has become an increasingly pressing issue. Therefore, low-power design is an important part of electronic product design. After careful analysis and summary by experts, the methods of low-power design are summarized as follows:
First, it is necessary to understand that power consumption is divided into power consumption during operation and power consumption during standby. The power consumption during operation is divided into power consumption of all functions and power consumption of some functions. For an electronic product, the total power consumption is the product of the voltage and current of the product during normal operation, which is one of the considerations for low-power design.
The second is the selection control of the module work, generally selecting a chip with a sleep function. For example, in designing a system, if some external modules are not used frequently in the work, you can put them into sleep mode or use digital switches in the hardware circuit design to work with the controller. When you need to use the module, Wake up, so that we can turn off some unnecessary devices when the whole system enters the low power mode to save power and extend the standby time.
Third, select the main control chip with power saving mode. Nowadays, the main control chip generally has a power saving mode. It can be known from previous experience that when the main control chip is in the power saving mode, its working current is often a fraction of the normal working current, which can greatly enhance the consumer class. The battery life of the product.
Fourth, the power consumption test. The power consumption test is divided into module power consumption and overall power consumption. The module power consumption needs to test the power consumption during sleep and the power consumption during operation. The power consumption of the whole machine is divided into power consumption during maximum load operation and power consumption during basic functions and power consumption during sleep.
In order to make products more competitive, the industry's requirements for chip design have shifted from purely high performance and small area to comprehensive requirements for performance, area and power consumption. As the core component of the digital system, the microprocessor's low-power design is of great significance to reduce the power consumption of the entire system.
Regarding FPGA low-power design, we can start from two aspects: one is algorithm optimization; the other is FPGA resource utilization efficiency optimization.
Algorithm optimization can be divided into two levels: implementation structure and implementation method. First of all, it is necessary to design an optimized algorithm implementation structure, design an optimized structure to minimize resource usage, and of course power consumption can be minimized, but performance is also required. FPGA design is in area and speed. Can be balanced; another level is the specific implementation method, among the signals that absorb power consumption in the design, the clock is the culprit. Although the clock may run at 100 MHz, the signal derived from this clock typically runs at a smaller component of the main clock frequency. In addition, the fanout of the clock is generally higher. These two factors show that in order to reduce power consumption, the clock should be carefully studied.
Resource usage efficiency optimization is a way to optimize power consumption when using some resources inside the FPGA such as BRAM and DSP48E1. FPGA dynamic power consumption is mainly reflected in the power consumption of memory, internal logic, clock, and I/O. The memory is a large power consumption, such as the memory block Block RAM in the xilinx FPGA. Therefore, some power optimization methods for the BRAM are mainly introduced here.
How to design low-power, we must think of MSP430, MSP430's specialty is to carry out low power consumption. Using this chip can make the brain of the product, the microcontroller, consume less power. But can such a process result in a low-power product or design? The low-power design of a product is not just a problem that can be solved with a low-power MCU. The low power consumption of the product will soon depend on the low power consumption of the MCU and also on the low-power peripheral hardware circuitry.
First, the power circuit of the low power system. For circuits with different voltages and different voltages, you can use a low-power buck-boost regulator circuit, such as TI's TPS630, which can stably operate in the voltage range of 1.8V~5.5V. Output 3.3V voltage. Of course, this circuit consumes slightly more power than a low-power LDO, and its static power consumption is 30~50uA. In addition, when the product does not need to be always on standby, a power switch circuit that is controlled by the program to be powered off can be used. Allows the product to automatically power down when not in use, resulting in lower power consumption.
Second, the power management of external circuits. Use a device with a shutdown function. For peripheral devices that do not need to work all the time, when not working, turn off part of the power supply as much as possible to achieve lower power consumption. For some circuits that do not have a shutdown pin, a MOS tube, a CMOS driver, etc. can be used to implement the power switch to perform power management on the local circuit. Of course, it would be ideal if a zero-power peripheral circuit could be used.
Third, to avoid leakage current of IO port. When the peripheral circuit has no power, the IO port may still be a potential power output. Therefore, when the peripheral circuit is powered off, the IO state should be set to the input state or the output low state to avoid leakage current.
Fourth, low power signal conditioning circuit. A large number of signal conditioning circuits are employed for various sensors. And a lot of classic signal conditioning circuits do not consider power consumption. For low-power product designs, low-power signal conditioning circuits should be used. For example, with a low-power op amp, the TLV2241 consumes only 1uA per op amp. Low-power, non-inverting or inverting amplifiers, low-power I/V conversion circuits, low-power instrumentation amplifiers, and more.
In general, low-power design is the development of the Internet of Things era, and has an important significance for the improvement of product performance. To this end, E-Friends Network will host the 2nd IoT 2015 conference, which will evaluate the business opportunities of IoT in various fields, and pay attention to the development status of IoT's important technology nodes and key innovative products, and explore sound product innovation solutions, which will also target the industry. The many challenges faced were held to hold workshops to discuss various solutions in the IoT era to create long-term development of IoT. 
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